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MPQ2122 6v, 2a, low quiescent current dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 1 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. the future of analog ic technology description the MPQ2122 is an internally-compensated, 1mhz fixed-frequency, dual pwm, synchronous, step-down regulator. the MPQ2122 operates from a 2.7v-to-6v input, generates an output voltage as low as 0.608v, and has a 45a quiescent current that makes it ideal for powering portable equipment that runs on a single cell lithium-ion (li+) battery. the MPQ2122 integrates dual 80m ? high-side switches and 35m ? synchronous rectifiers for high efficiency without an external schottky diode. peak-current mode control and internal compensation limits the minimum number of readily-available external components. fault-condition protections include cycle-by-cycle current limiting and thermal shutdown. the MPQ2122 is available in an 8-pin tsot23-8 package. features ? dual 2a-output current ? >93% peak efficiency ? >80% light-load efficiency ? wide 2.7v-to-6v operating input range ? 80m ? and 35m ? internal power mosfet ? 1mhz fixed switching frequency ? adjustable output from 0.608v to vin ? 180 phase-shifted operation ? 100% duty-cycle operation ? 45a quiescent current ? cycle-by-cycle over-current protection ? short-circuit protection with hiccup mode ? thermal shutdown ? available in an 8-pin tsot23-8 package applications ? small/handhold devices ? dvd drivers ? portable instruments ? smartphones and feature phones ? battery-powered devices a ll mps parts are lead-free, halogen free, and adhere to the rohs directive. for mps green status, please visit mps website under quality a ssurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application 30 40 50 60 70 80 90 100 0.01 0.1 1 10
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 2 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. ordering information part number* package top marking MPQ2122gj tsot23-8 see below * for tape & reel, add suffix ?z (e.g. MPQ2122gj?z). top marking aed: product code of MPQ2122gj; y: year code; package reference 1 2 3 4 8 7 6 5 top view fb2 sw2 en1 en2 fb1 sw1 gnd in tsot23-8
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 3 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. absolute maximum ratings (1) supply volt age vi n ..................................... 6.5v v sw ?0.3v (-3v for<10ns) to 6.5v (7.5v for<10ns) all other pins ............................ ?0.3v to +6.5 v junction temper ature .............................. 150c lead temperat ure ................................... 260c continuous power dissipation (t a = +25c) (2) ................................................................ 1.25w recommended operating conditions (3) supply voltage v in ............................ 2.7v to 6v output voltage v out ................... 0. 608v to 5.5v operating junction temp . ........ -40c to +125c thermal resistance (4) ja jc tsot23-8 ..................................... 100 ..... 55 c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanen t damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 4 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. electrical characteristics (5) v in = v en = 3.6v, t j = -40oc to + 125c, unless otherwise noted. typical values are at t j =25oc. parameters symbol condition min typ max units supply current (quiescent) i q vin=3.6v, v en =2v, v fb = 0.65v t j = +25c 35 45 55 a t j = -40c to +125c 30 45 60 shutdown current v en = 0v t j = +25c 0 1 a in under-voltage lockout threshold rising edge 2.4 2.5 2.6 v in under-voltage lockout hysteresis 300 mv regulated fb voltage v fb t a = +25c 0.596 0.608 0.620 v t j = -40c to +125c 0.59 0.608 0.626 fb input current v fb = 0.608v 10 50 na en, high threshold ?40c t j +125c 1.2 v en, low threshold ?40c t j +125c 0.4 v internal soft-start time ss 0.5 ms high-side switch, on- resistance r dson_p vin=5v 80 m ? low-side switch, on- resistance r dson_n vin=5v 35 m ? sw leakage current v en = 0v; vin = 6v v sw = 0v and 6v t j = +25c ?1 0 1 a high-side switch, current limit sourcing, d=40% t j = +25c 2.8 3.5 4.5 a t j = -40c to +125c 2.3 3.5 4.5 oscillator frequency both channels work in ccm 0.8 1 1.2 mhz phase shift 180 degree minimum on time (6) on_min 90 ns minimum off time off_min 100 ns maximum duty cycle 100 % thermal shutdown threshold (6) hysteresis = 30c 160 c notes: 5) production test at +25c. specifications over the temperature range are guaranteed by design and characterization. 6) guarantee by design
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 5 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics v in = 5v, v out1 = 1.8v, v out2 = 1.2v, l = 1.5h, c out1 =c out2 =22f, t a = 25c, unless otherwise noted. 30 40 50 60 70 80 90 100 0.01 0.1 1 10 30 40 50 60 70 80 90 100 0.01 0.1 1 10 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0 0.20.4 0.6 0.8 1 1.2 1.41.6 1.8 2 2.2 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0 0.20.4 0.6 0.8 1 1.21.4 1.6 1.8 2 2.2 20 30 40 50 60 70 80 -60 -40 -20 0 20 40 60 80 100 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 -60 -40 -20 0 20 40 60 80 100 1 1.5 2 2.5 3 3.5 4 4.5 5 -60 -40 -20 0 20 40 60 80 100 0 5 10 15 20 25 30 0 0.5 1 1.5 2 2.5 590 595 600 605 610 615 620 -60 -40 -20 0 20 40 60 80 100
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 6 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 5v, v out1 = 1.8v, v out2 = 1.2v, l = 1.5h, c out1 =c out2 =22f, t a = 25c, unless otherwise noted. 0 5 10 15 20 25 30 35 40 0 0.5 1 1.5 2 2.5
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 7 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 5v, v out1 = 1.8v, v out2 = 1.2v, l = 1.5h, c out1 =c out2 =22f, t a = 25c, unless otherwise noted.
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 8 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 5v, v out1 = 1.8v, v out2 = 1.2v, l = 1.5h, c out1 =c out2 =22f, t a = 25c, unless otherwise noted. v out1 1v/div. v out1 1v/div. v out2 1v/div. v out1 1v/div. i l1 500ma/div. v out2 5v/div. sw 2v/div. v out1 1v/div. i l1 1a/div. v out2 5v/div. sw 5v/div. v out1 1v/div. i l1 2a/div. v out2 5v/div. sw 5v/div. v out1 1v/div. v out2 1v/div. en 5v/div. v out1 1v/div. v out2 1v/div. en 5v/div. v out2 1v/div. en 5v/div. en 5v/div. v out1 1v/div. v out2 1v/div. en 5v/div. v out1 1v/div. v out2 1v/div. en 5v/div. en on without load i out1 = i out2 = 0a en on with half load i out1 = i out2 = 1a en on with full load i out1 = i out2 = 2a 1s/div. en down without load i out1 = i out2 = 0a en down with half load i out1 = i out2 = 1a en down with full load i out1 = i out2 = 2a vin power on without ioad i out1 = i out2 = 0a vin power on i out1 =1a, i out2 = 0a vin power on i out1 = 2a, i out2 = 0a
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 9 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 5v, v out1 = 1.8v, v out2 = 1.2v, l = 1.5h, c out1 =c out2 =22f, t a = 25c, unless otherwise noted. v out1 1v/div. i l1 500ma/div. v in 5v/div. sw 2v/div. v out1 1v/div. i l1 500ma/div. v in 5v/div. sw 5v/div. v out1 1v/div. i l1 500ma/div. v in 5v/div. sw 5v/div. v out1 1v/div. i l1 1a/div. v in 5v/div. sw 5v/div. v out1 1v/div. i l1 2a/div. v in 5v/div. sw 5v/div. v out1 1v/div. i l1 1a/div. v in 5v/div. sw 5v/div. v out1 1v/div. i l1 2a/div. v in 5v/div. sw 5v/div. v out1 1v/div. i l1 1a/div. v in 5v/div. sw 5v/div. v out1 1v/div. i l1 2a/div. v in 5v/div. sw 5v/div. 40ms/div. vin power down i out1 = i out2 = 0a 10ms/div. vin power down i out1 = 1a, i out2 = 0a 10ms/div. vin power down i out1 = 2a, i out2 = 0a enable on i out1 = i out2 = 0a enable on i out1 = 1a, i out2 = 0a enable on i out1 = 2a, i out2 = 0a 1s/div. enable down i out1 = i out2 = 0a enable down i out1 =1a, i out2 = 0a enable down i out1 = 2a, i out2 = 0a
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 10 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 5v, v out1 = 1.8v, v out2 = 1.2v, l = 1.5h, c out1 =c out2 =22f, t a = 25c, unless otherwise noted. v sw1 5v/div. v out1 ac coupled 100mv/div. i out1 1a/div. v sw2 5v/div. v out2 ac coupled 100mv/div. i out2 1a/div.
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 11 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. pin functions package pin # name description 1 fb2 feedback 2. error amplifier input. connect to the tap of an external resistor divider between the output and gnd. sets the regulation voltage. 2 en2 channel 2 enable. buck. 3 sw2 switch node connects to the channel 2 internal high-side and low-side power mosfets..connects to the inductor. 4 en1 channel 1 enable. buck. 5 gnd ground. 6 sw1 switch node connects to the channel 1 internal high-side and low-side power mosfets..connects to the inductor. 7 in input supply. requires a decoupling capacitor to ground to reduce switching spikes. 8 fb1 feedback 1. error amplifier input. connect to the tap of an external resistor divider between the output and gnd. sets the regulation voltage.
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 12 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. hi-z slope comp comp1 islope1 osc1 ph1 hi-z slope comp comp2 islope2 osc2 sw1 sw2 ph2 fb1 fb2 en1 en2 uvlo & bandgap 0.608v uvlo vin vin gnd gnd main switch pch synchronous rectifier nch low side gate driver low side gate driver synchronous rectifier nch main switch pch control logic control logic pw m pw m internal ss internal ss 0.608v 0.608v 1mhz oscillator figure 1: functional block diagram
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 13 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. operation MPQ2122 is a fully-integrated, dual-channel, synchronous, step-down converter. both channels have peak-current modes with internal compensation for faster transient responses and cycle-by-cycle current limits. MPQ2122 is optimized for low-voltage, portable applications where efficiency and small size are critical. 180 phase-shift by default, the MPQ2122?s two channels operate at a 180 phase-shift to reduce input current ripple: the smaller current ripple allows for a smaller input bypass capacitor. in ccm, two internal clocks control the switching: the high-side mosfet turns on at the corresponding clk?s rising edge. clk1 clk2 sw1 sw2 t clk1, 2 has a 180 o phase shift figure 2: clock/switching timing however, the switching frequency for each channel falls when operating at low dropout, so the MPQ2122 operates at a default switching frequency of 1mhz with a fixed off time. after the input voltage recovers, switching for pwm mode resumes normally and synchronizes with the master oscillator for phase-shifted operation. light-load operation in light loads, the MPQ2122 uses a proprietary control scheme to save power and improve efficiency. the MPQ2122 will turn off the low side switch when inductor current starts to reverse. then MPQ2122 works in discontinuous conduction mode (dcm) operation. when either channel enters dcm or low- dropout operation, this channel will not be controlled by the internal 1mhz oscillator. condition mode ch1 ch2 ch1 ch2 1 heavy load 1mhz ccm 1mhz ccm,0 phase 2 light load dcm dcm 3 low dropout fixed off time fixed off time 4 heavy load light load 0.95mhz ccm dcm 5 light load heavy load dcm 0.95mhz ccm 6 heavy load low dropout 0.95mhz ccm fixed off time 7 low dropout heavy load fixed off time 0.95mhz ccm 8 light load low dropout dcm fixed off time 9 low dropout light load fixed off time dcm soft start MPQ2122 has a built-in soft start that ramps up the output voltage at a controlled slew rate to start-up overshoot. the soft-start time is ~0.5ms. current limit and short-circuit recovery each channel?s high-side switch has a 3.5a (typ.) current limit. the MPQ2122 treats any current-limit condition that remains for 400us as a short and enter hiccup mode. the MPQ2122 disables its output power stage in hiccup mode, and then slowly discharges the soft-start capacitor before initiating soft-start. if the short-circuit condition remains, the MPQ2122 repeats this operation till the short circuit disappears and output returns to the regulation level.
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 14 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. application information component selection output voltage external resistor dividers connected to the fb pins set the output voltages. the feedback resistor connected to fb1 (r1) also sets the feedback loop bandwidth (f c ). f c does not exceed 0.1f sw . when using a ceramic output capacitor (c o ), set the range to 50khz and 100khz for optimal transient performance and good phase margin. w hen using an electrolytic capacitor, set the loop bandwidth no higher than 1/4 the esr zero frequency (f esr ). f esr is: esr esr o 1 f 2 rc = ?? we suggest using a 600k to 800k resistor for r1 when c o =22 f. r2 is then: out r1 r2 v 1 0.608v = ? table 1: resistor values vs. output voltage v out r1 r2 l c out (ceramic) 1.2v 806k ? 825k ? 0.47 h-2.2 h 22 f 1.5v 806k ? 549k ? 0.47 h-2.2 h 22 f 1.8v 806k ? 412k ? 0.47 h-2.2 h 22 f 2.5v 806k ? 261k ? 1 h-4.7 h 22 f 3.3v 806k ? 182k ? 1 h-4.7 h 22 f inductor selection use a 1.5h-to-2.2h inductor with a dc current rating of at least 1.25 times the maximum load current for most applications. for best efficiency, select an inductor with a dc resistance <20m ? . see table 2 for recommended inductors. for most designs, estimate the inductance value using the following equation: out in out in l osc v(v v) l v if ? = ?? where ? i l is the inductor ripple current. select an inductor ripple current equal to approximately 30% of the maximum load current, 2a. the maximum inductor peak current is: l l(max) load i i=i+ 2 table 2: suggested surface-mount inductors v endo r part number l ( h) dcr (m ? ) sc (a) l x w x h (mm 3 ) wurth 744777002 2.2 13 6 7.37.34.5 744310200 2 14.2 6.5 76.93 tdk rlf7030t- 1r5n6r1-t 1.5 8 6.5 7.86.83.2 input capacitor the input capacitor reduces the surge current drawn from the input and the switching noise from the device. select an input capacitor with a switching-frequency impedance that is less than the input source impedance to prevent high- frequency-switching current from passing to the input source. use low-esr ceramic capacitors with x5r or x7r dielectrics with small temperature coefficients. for most applications, a 22f capacitor is sufficient. output capacitor the output capacitor limits the output voltage ripple and ensures a stable regulation loop. select an output capacitor with low impedance at the switching frequency. use ceramic capacitors with x5r or x7r dielectrics. using an electrolytic capacitor may result in additional output voltage ripple, thermal issues, and requires additional care in selecting the feedback resistor (r1) due to the large esr. the output ripple ( ? v out ) is approximately: out in out out in osc osc o v(v v) 1 vesr vf l 8f c ?? ? =?+ ?? ?? ?? ?? power dissipation ic power dissipation plays an important role in circuit design?not only because of efficiency concerns, but also because of the chip?s thermal requirements. several parameters influence power dissipation, such as: ? conduction loss (cond) ? dead time (dt)
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 15 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. ? switching loss (sw) ? mosfet driver current (dr) ? supply current (s) based on these parameters, we can estimate the power loss as: loss cond dt sw dr s pppppp =++++ thermal regulation as previously discussed, changes in ic temperature change the electrical characteristics, especially when the temperature exceeds the ic?s recommended operating range. managing the ic?s temperature requires additional considerations to ensure that the ic runs below the maximum-allowable temperature. while operating the ic within recommended electrical limits is a major component to maintaining proper thermal regulation, specific layout designs can improve the thermal profile while limiting costs to either efficiency or operating range. for the MPQ2122, connect the ground pin on the package to a gnd plane on top of the pcb to use this plane as a heat sink. connect this gnd plane to gnd planes beneath the ic using vias to further improve heat dissipation. however, given that these gnd planes can introduce unwanted emi noise and occupy valuable pcb space, design the size and shape of these planes to match the thermal resistance requirement: sa ja jc =? however, connecting the gnd pin to a heat sink can not guarantee that the ic will not exceed its recommended temperature limits; for instance, if the ambient temperature exceeds the ic?s temperature limits. if the ambient air temperature approaches the ic?s temperature limit, options such as derating the ic so it operates using less power can help prevent thermal damage and unwanted electrical characteristics. pcb layout proper layout of the switching power supplies is very important, and sometimes critical for proper function: poor layout design can result in poor line or load regulation and stability issues. place the high-current paths (gnd, in and sw) very close to the device with short, direct, and wide traces. place the input capacitor as close as possible to the in and gnd pins. place the external feedback resistors next to the fb pin. keep the switching node sw short and away from the feedback network. the circuit of below pcb layout is shown in figure 4. 1 8 7 6 5 out1 en2 sw1 vin c1a c1b r1 r2 agnd sw2 out2 en1 r3 r4 c3 c4 c6 c5 gnd 2 3 4 figure 3: suggested pcb layout design example below is a design example following the application guidelines for the specifications: table 3: design example vin 5v vout1 1.8v vout2 1.2v the detailed application schematic is shown in figure 1. the typical performance and circuit waveforms have been shown in the typical performance characteristics section. for more device applications, please refer to the related evaluation board datasheets.
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator MPQ2122 rev. 1.0 www.monolithicpower.com 16 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application circuits figure 4: typical application circuit
MPQ2122 ?6v, 2a, low quiescent current, dual, sync buck regulator notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MPQ2122 rev. 1.0 www.monolithicpower.com 17 3/2/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. package information tsot23-8 front view note: 1) all dimensions are in millimeters . 2) package length does not include mold flash, protrusion or gate burr . 3) package width does not include interlead flash or protrusion . 4) lead coplanarity (bottom of leads after forming) shall be 0.10 millimeters max. 5) jedec reference is mo -193, variation ba. 6) drawing is not to scale . 7) pin 1 is lower left pin when reading top mark from left to right, (see example top mark) top view recommended land pattern seating plane side view detail ''a'' see detail '' a'' iaaaa pin 1 id see note 7 example top mark

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